It's always cool to see new developments in transistor materials and fabrication. It gives me hope that the industry will survive beyond the end of Moore scaling (arguably, we're already past it). Then I see that their prototypes are 100um wide and 250nm long. Quite a ways to go to match our state of the art 2-3nm processes (which don't actually have feature sizes that small but they're still in single digit nm)

This appears to focus on mobile devices due to potential chip size reduction, but is there a reason this isn't just as useful as a transistor improvement for desktop chips? Is it slower?

This is a future technology that is one of the candidates for replacing silicon as the semiconductor material for digital circuits.

The replacement of silicon might happen 10 years from now, or even later, it is not something that will happen before 2030.

So these transistors are neither for desktop chips nor for mobile chips, but for all of them. Nevertheless besides molybdenum sulfide (this article) and similar materials, there are other 4 or 5 alternatives, e.g. diamond, carbon nanotubes and others. It is not known for sure which will be the winning technology for replacing silicon.

All the alternatives for silicon have currently various problems that must be solved in order to make possible their practical use.

This paper appears to solve one of the difficult existing problems. Molybdenum sulfide and a few other similar materials can form an active single-crystal layer suitable for making transistors in it that has a thickness of only one atom. Therefore using such a material will achieve the smallest possible thickness. A smaller thickness is a precondition for reducing also the horizontal dimensions that determine the transistor density per area.

The problem is that over the semiconductor layer, one has to deposit an insulating layer in order to make a MOS field-effect transistor. While for the semiconductor layer it was known how to make an almost perfect layer only 1-atom thick, depositing over it an insulator resulted in a layer with non-uniform thickness and with many defects.

This paper shows a method that creates an insulating layer with a similar thickness and uniformity as the 1-atom thick semiconductor layer on which it is deposited. This greatly increases the chances that it will become possible to make integrated circuits with such materials instead of silicon.

Just take a minute to think about the fact that we can make 1 atom thick material and then force it to do thinking. That's genuinely stunning.

I remember when IBM wrote "IBM" using single atoms. It took quite a while to get to this planar blanket and is great progress.

I remember where I was when I read that article in Scientific American. What a time to be alive!

A look at a microscopic image of any CPU is mind boggling, even older ones. Layer upon layer of stacked complexity, almost down to the single atom level.

I hope you're correct because you did a great job explaining it and I completely believe you.

> It is also a necessity for the development of 5G devices that will come with AI applications that are still in development. There is also expected to be a need to reduce the size of devices used in IoT applications.

Feels like they were just throwing every possible use case and buzzword out there honestly.

No blockchain, so there is room for a second version.

It depends? This is really early research long before viability in a production capacity.

If when it's scaled up it can be lower power for the same size that's a good thing of course but modern high end compute (desktop & server) are pushing towards 3D transistors because the main bottleneck (other than heat dissipation) is the length of the critical paths. The hope is that while 3D transistors would make heat dissipation harder, they have the potential to significantly reduce the length that electricity has to flow between one register and the next (which must all happen in a single clock cycle).

The "2D" used here refers to something completely different than to what "2D" and "3D" refer when discussing CMOS transistors.

All CMOS transistors, regardless if they use a 2D geometry or a 3D geometry are made with silicon. Silicon is a 3D semiconductor material. For silicon to behave as a semiconductor, there must exist a big enough volume of material, with several atom layers in all the three directions of the space.

Besides 3D semiconductor materials, there exist also 2D semiconductor materials, which consist of sheets that have a thickness of only one atom, for instance molybdenum disulfide, tungsten disulfide or graphene.

In such 2D semiconductor materials, it is enough to have several atom layers in only two directions of the space, while in the third the thickness is of only one atom, i.e. the smallest possible.

The article shows a very important progress in the direction of enabling the making of integrated circuits that use 2D semiconductor materials instead of silicon.

It might have to do with disposability.

There are some forces at work that would tend not to have it go into production unless it was cheaper.

And then if it was cheaper, it wouldn't matter very much if it was less reliable.

Especially if you're just going to throw it away before too long anyway.

That's going to be a hell of a big GDSII file.